SPC560B60L5B6E0X   NXP

 High performance 64 MHz e200z0h CPU
– 32-bit Power Architecture® technology CPU
– Up to 60 DMIPs operation
– Variable length encoding (VLE)
 Memory
– Up to 1.5 MB on-chip Code Flash with ECC
– 64 KB on-chip Data Flash with ECC
– Up to 96 KB on-chip SRAM with ECC
– 8-entry MPU
 Interrupts
– 16 priority levels
– Non-maskable interrupt (NMI)
– Up to 51 external interrupts lines including 27 wake-up lines
 16-channel eDMA (linked to PITs, DSPI, ADCs, eMIOS, LINFlex and I2C)  GPIOs: 77 (LQFP100), 121 (LQFP144) and 149 (LQFP176)
 Timer units – 8-channel 32-bit periodic interrupt timer
– 4-channel 32-bit system timer
– System watchdog timer
– Real-time clock timer
 eMIOS, 16-bit counter timed I/O units
– Up to 64 channels with PWM/MC/IC/OC
– Up to 10 counter basis
– ADC diagnostic trigger via CTU
 One 10-bit and one 12-bit ADC with up to 53 channels
– Extendable to 81 channels
– Individual conversion registers
 Cross triggering unit (CTU)
 Dedicated diagnostic module for lighting
– Advanced PWM generation
– Time-triggered diagnostics
– PWM-synchronized ADC measurements
 On-chip CAN/UART bootstrap loader
 Communications interfaces
– Up to 6 FlexCAN (2.0B active) with 64 message buffers each
– Up to 10 LINFlex/UART channels
– Up to 6 buffered DSPI channels
– I2C interface
 Clock generation
– 4 to 16 MHz fast external crystal oscillator
– 32 kHz slow external crystal oscillator
– 16 MHz fast internal RC oscillator
– 128 kHz slow internal RC oscillator for lowpower modes
– Software-controlled FMPLL
– Clock monitoring unit
 Low-power capabilities
– Several low-power mode configurations
– Ultra-low-power standby with RTC and communication
– Fast wakeup schemes
 Exhaustive debugging capability
– Nexus 2+ interface on LBGA208 package
– Nexus 1 on all packages
 Voltage supply
– Single 5 V or 3.3 V supply
– On-chip voltage regulator
– External ballast resistor support
 LQFP100, LQFP144, and LQFP176 packages; LBGA208 package for Nexus2+
 Operating temperature range -40 to 125 °C